This invention relates to semiconductor memory devices, and more particularly to an improved sense amplifier for an N-channel MOS memory device of the type employing one-transistor memory cells.
MOS random access memory (RAM) devices are widely used in the manufacture of digital equipment, particularly minicomputers. The capabilities and cost advantages of these devices have increased steadily over the past few years. The cost per bit of storage using MOS RAMs goes down as the number of bits or memory cells per package goes up. Successively larger RAM's have been standards in the industry, such as 256 bit, 512 bit, 1024 bit, and how 4096 bit. A RAM containing 4096 bits, for example, is shown in U.S. Pat. No. 3,940,747 issued Feb. 24, 1976 to Kuo and Kitagawa, assigned to Texas Instruments. At the present time, manufacturers of semiconductor devices are attempting to produce 16,384 bit or "16K" RAM's; see articles in Electronics, Feb. 19, 1976, pp. 116-121, and May 13, 1976, pp. 81-86.
As the number of bits in a semiconductor chip is increased, the cell size decreases, and the magnitude of the storage capacitor in each cell of necessity decreases. Also, the number of cells on a digit line in the array of cells increases, so the capacitance of this line increases. These factors reduce the magnitude of the data signal which exists on a digit line. A full logic level, i.e., the difference between a "1" and "0," in one of these devices may be perhaps 10 or 12 volts; however, the difference in voltage between a "1" and a "0" for the data coupled to a digit line in the memory array from the selected one-transistor cell may be only one tenth volt or less. Various circuits for sensing these low-level signals have been proposed. For example, sense amplifiers are shown in U.S. Pat. No. 3,940,747 and the Electronics articles mentioned above, and in U.S. Pat. No. 3,838,404 to Heeren, as well as in Electronics, Sept. 13, 1973, Vol. 46, No. 19, pp. 116-121, and IEEE Journal of Solid State Circuits, Oct. 1972, p. 336, by Stein et al.
When applied to memory devices requiring high packing density, high speed, and low power dissipation, such as in the 16K RAM, the sense amplifiers previously proposed have shortcomings. Some exhibit high power dissipation and overly long charging times for the digit lines. Others require high instantaneous current and critical clock timing.
It is therefore a principal object of this invention to provide an improved sense amplifier for an MOS RAM, and in particular a sense amplifier which is of low power dissipation and high speed operation, as well as high sensitivity.